Advances in technology have resulted in smaller and more powerful computing devices. For example, there currently exist a variety of portable personal computing devices, including wireless computing devices, such as portable wireless telephones, personal digital assistants (PDAs), and paging devices that are small, lightweight, and easily carried by users. More specifically, portable wireless telephones, such as cellular telephones and Internet Protocol (IP) telephones, can communicate voice and data packets over wireless networks. Further, many such wireless telephones include other types of devices that are incorporated therein. For example, wireless telephones can also include a digital still camera, a digital video camera, a digital recorder, and an audio file player. Also, such wireless telephones can process executable instructions, including software applications, such as a web browser application, that can be used to access the Internet. As such, these wireless telephones can include significant computing capabilities.
Digital signal processors (DSPs), image processors, and other processing devices are frequently used in portable personal computing devices and operate in conjunction with one or more caches. A cache is memory that may store a copy of data that exists somewhere in a memory hierarchy. In some cases, the cache may have the only “up to date” copy of the data in the system. One component of a cache is a data memory that may be divided into multiple cache lines. Another component of a cache is a mechanism (e.g., a tag) to associate a system memory address with a particular cache line. An additional component of a cache is a state indicator to indicate whether a cache line is valid, modified, owned, and the like.
When a cache memory is re-sized, re-configured, and/or a line of the cache memory is locked, access to the cache memory may be restricted. For example, to change a size of the cache memory, a clean operation copies data stored in the cache memory to a backing memory. Generally, during the clean operation, only a single thread (or only a single processor) may access the cache memory (i.e., to perform the clean operation) while other threads (or other processors) are blocked from accessing the cache. After the clean operation is completed and the size of the cache memory is changed, the other threads (or other processors) may then perform operations on the cache memory. Blocking the other threads (or other processors) from accessing the cache memory during execution of the clean operation causes a performance loss that can extend for several clock cycles. As another example, to lock or unlock a line of the cache memory, a block of addresses (including the line of the cache memory to be locked) is only accessible to a single thread (or a single processor) that operates on the block of addresses (e.g., to lock or unlock the line of the cache memory).